final/production release information - the information contained in this document is about a product in fully tested and charactherized phase. all features described herein are supported. contact amcc for updates to this document and the latest product status. empowering intelligent optical networks product brief danube sonet/sdh sts-48/stm-16 framer/pointer processor part number s4805cbi11, revision 1.5, january 2003 sonet/sdh mux/demux, transport overhead terminating transceiver and pointer processors for sts-48/stm-16 and up to 4 x sts-12/stm-4 or 16 x sts-3/stm-1s. serial sts-12/stm-4 and sts-3/stm-1 interfaces. provisionable as sonet or sdh on a per line basis. provisionable as soh/loh pass-through or termination/regen- eration device. built-in 192x48 cross-connects for sts-1 level cross-connec- tion or add/drop, in both mux and demux directions. compliant with bellcore gr-253, itu g.707, and ansi t1.105 -1995 standards. multiplex direction: supports parallel sts-48/stm-16 or serial 4xsts-12/stm-4 or serial 16xsts-3/stm-1 inputs. provides a single sts-48/stm-16 output. pointer processors for all valid input combinations of sts-48c/ au-4-16c, sts-12c/au-4-4c, sts-3c/au-4, or sts-1/au-3 signals. non-intrusive toh monitoring for all inputs: sts-48, 4xsts-12 or 16xsts-3. provisionable pointer processor bypass available for sts-48 to sts-48 operation (through-timing). both a full bypass (no frame regeneration) as well as a pointer processor bypass (frame regeneration can be enabled) are provided. toh can be either terminated/regenerated, or transparently passed-through device on a per-function basis, in both through-timing and pointer processor applications. for multiplex applications (4xsts-12 or 16xsts-3), the toh for the lower speed tributaries is passed-through in the unused bytes of the outgoing sts-48 signal. sts-48 frame regeneration on output side. provisionable pass- through or regeneration of defined toh bytes. demultiplex direction: supports a single sts-48/stm-16 input. provides parallel sts-48/stm-16, serial 4xsts-12/stm-4 or serial 16xsts-3/stm-1 outputs. pointer processor for all valid input combinations of sts-48c/ au-4-16c, sts-12c/au-4-4c, sts-3c/au4, or sts-1/au-3 sig- nals. non-intrusive sts-48/stm-16 toh monitor. provisionable pointer processor bypass available for sts-48 to sts-48 operation (through-timing). both a full bypass (no frame regeneration) as well as a pointer processor bypass (frame regeneration can be enabled) are provided. toh can be either terminated/regenerated, or transparently passed-through the device on a per-function basis, in both through-timing and pointer processor applications. sts-48/sts-12/sts-3 frame regeneration on output side. pro- visionable pass-through or regeneration of defined toh bytes. figure 1: block diagram mx_hs_155data_out[1:16] dx_hs_155clk_in fram48 frgn48 mx_hs_155clk_out dx_hs_155data[1:15] toh drop toh insert toh insert toh dx_ls pclk_out high speed interface low speed interface demux direction mux direction d[15:0] addr[12:0] csn rdb(dsb) wrb(rwb) rdyb(dtackb) busmode intb microprocessor i/f rstb aps_intb upclk 4xfr12/3 + 12xfr3 tx framgen 4xfr12/3+12xfr3 rx frmrs pointer proc. drop dx_hs_155frm_in demux toh insert mx_toh_lsdata_out[1:16] mx_toh_lsfrm_out[1:16] mx_toh_lsclk_out[1:16] dx_toh_ls_5/20clk_out dx_toh_lsdata_in[1:16] dx_toh_ls_5/20frm_out sel dx_ref_clk_in dx_toh_hsclk_out dx_toh_hsdata_out[1:4] dx_toh_hsfrm_out mx_toh_hsdata_in[1:4] mx_toh_hsfrm_in mx_toh_hsclk_out pointer proc. mx_prot_data_out[1:4] mx_prot_data_in_[1:4] dx_prot_data_in[1:4] dx_prot_data_out_[1:4] dx_async_frm_in 4 4 4 4 dx_losext_in dx_alarm_out dx_ls_pdata_out[1:16] mx_lsdata_in[1,5,9,13] mx_lsclk_in[1,5,9,13] mx_alarm_out[1:16] mx_losext[1:16] gpio[15:0] tck tdo tms trstb tdi ts_en syncmode dx_async_frm_out sel or 1 x fr48 or 1 x fr48 p/s s/p mx_hs_622data_out[1:4] mx_hs_622clk_out dx_hs_622clk_in dx_hs_622data_in[1:4] mx_ls_pclk_in mx_ls_pdata_in[1:16] dx_lsdata_out[1,5,9,13] dx_lsclk_out_[1,5,9,13] dx_refclk_in dx_prot_clk_out dx_prot_clk_in mx_prot_refclk_in mx_prot_clk_out mx_ref_clk_in mx_async_frm_out mx_async_frm_in dx_toh_ls_5/20enb_in mx_toh_hsenb_in mx_prot_clk_in dx_prot_refclk_in
2 empowering intelligent optical networks product brief danube sonet/sdh sts-48/stm-16 framer/pointer processor part number s4805cbi11, revision 1.5, january 2003 overview and applications sonet processing the s4805 can be used in either sonet or sdh applications. on the low-speed side, it can interface to 4 groups of either 1 sts- 12/stm-4 or 4 sts-3/stm-1 signals in each direction. in the demultiplex direction, the s4805 accepts an sts-48/stm- 16 signal, either in 4-bit wide, 622 mhz or 16-bit wide, 155 mhz format. there are then several modes of operation that the s4805 supports in the demultiplex direction. for sts-48 only operation, the s4805 provides a full-bypass mode, as well as a pointer processor bypass mode. in the full- bypass mode, the s4805 simply passes the incoming sts-48/ stm-16 signal directly through to the demux output. framing, descrambling and toh monitoring are performed off-line, in a non-intrusive manner for monitoring purposes only. no pointer processing, cross-connection or frame regeneration is performed. in pointer processor bypass operation, the s4805 locates the incoming sts-48/stm-16 frame, optionally descrambles the data, and non-intrusively monitors the toh. the sts-48/stm-16 signal is then passed directly to the frame generation block, in which outgoing toh overhead bytes can be provisionally regen- erated, on a per function basis. again, no pointer processing is performed, and the cross-connect block is bypassed. for applications requiring pointer processing, the s4805 locates frame in the incoming sts-48/stm-16 signal, performs descram- bling, monitors the toh bytes, and then performs pointer pro- cessing. the pointer processor provides a mode in which the incoming toh bytes transparently pass through the pointer pro- cessor to the corresponding locations in the toh of the outgoing tributaries. the toh bytes involved in this transparent pass- through mode include the defined overhead bytes for the constitu- ent sts-3/stm-1, sts-12/stm-4 or sts-48/stm-16 signals. a 192x48 cross-connect block is available after the pointer proces- sor. this cross-connect can be used to select sts-1s from any of the demuxed tributaries, tributaries from the low-speed mux inputs, or tributaries from the dx and mx aps interfaces to place into any one of the outgoing sts-1 time slots in any of the outgo- ing signals in the demux direction. if this signal does not contain a sts-48c/au-4-16c payload, the s4805 can demultiplex the signal to 4 groups of either 1 sts-12/stm-4 or 4 sts-3/stm-1 tributar- ies. the selected tributaries then proceed in the demux direction to frame generators that provisionally generate the toh/soh bytes, perform scrambling, and output the data. alternatively, the overhead data can be transparently passed through the frame generation block. in the multiplex direction, the s4805 accepts a single sts-48/ stm-16 signal (4-bits wide, 622 mhz or 16-bit wide, 155 mhz), 4 serial sts-12/stm-4 (622 mhz) signals or 4 groups of 4 serial (155 mhz) sts-3/stm-1 signals. there are several modes of operation that the s4805 supports in the multiplex direction. for sts-48 only operation, the s4805 provides a full-bypass mode, as well as a pointer processor bypass mode. in the full- bypass mode, the s4805 simply passes the incoming sts-48/ stm-16 signal directly through to the mux output. framing, descrambling and toh monitoring are performed off-line, in a non-intrusive manner for monitoring purposes only. no pointer processing, cross-connection or frame regeneration is performed. in pointer processor bypass operation, the s4805 locates the incoming sts-48/stm-16 frame, optionally descrambles the data, and non-intrusively monitors the toh. the sts-48/stm-16 signal is then passed directly to the frame generation block, in which outgoing toh overhead bytes can be provisionally regen- erated, on a per function basis. again, no pointer processing is performed, and the cross-connect block is bypassed. for applications requiring pointer processing, the s4805 locates the incoming sts-48/stm-16, sts-12/stm-4 or sts-3/stm-1 frames, descrambles the data, non-intrusively monitors the toh/ soh bytes and then performs pointer processing. the pointer processor provides a mode in which the incoming toh bytes transparently pass through the pointer processor to the corre- sponding locations in the toh of the outgoing tributaries. the toh bytes involved in this transparent pass-through mode include the defined overhead bytes for the constituent sts-3/ stm-1, sts-12/stm-4 or sts-48/stm-16 signals. a 192x48 cross-connect block is available after the pointer processor. this cross-connect can be used to select sts-1s from the incoming multiplex side signals, tributaries from the demux direction, or trib- utaries from either the dx or mx aps interface. these selected tributaries are then muxed into an sts-48/stm-16 signal. this sts-48/stm-16 muxed signal then proceeds to a frame genera- tor that provisionally generates the toh/soh bytes, performs scrambling, and outputs the data. alternatively, the overhead data can be transparently passed through from the mux inputs to out- put. low-speed interfaces on the low-speed side, in both the mux and demux directions, the s4805 supports either a 16-bit wide, 155 mb/s sts-48/stm-16 signal, a 4-bit wide, 622 mb/s sts-48/stm-16 signal, 4 serial sts-12/stm-4 signals operating at 622 mb/s or 4 groups of 4 serial sts-3/stm-1 signals operating at 155 mb/s. the s4805 is designed to bolt directly to fiber optic transceivers with built-in clock data recovery. (see figure below.) high-speed interface on the high-speed side, in both the mux and demux directions, the s4805 supports either a 16-bit wide, 155 mb/s or a 4-bit wide, 622 mb/s sts-48/stm-16 signal. controller interface a high-speed microprocessor interface is provided for configura- tion and monitoring. s4805 provides numerous automatic moni- toring functions. it can be configured to provide an interrupt to the control system, or it can be operated in a polled mode. applications: sonet/sdh add/drop multiplexers, terminal multiplexers, and digital cross connects. wdm/dwdm mux/demux applications
amcc reserves the right to make changes to its products, or to discontinue any product or service without notice, and advises i ts customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied upon is c urrent. amcc is a registered trademark of applied micro circuits corporation. copyright ? 2002 applied micro circuits corporation. all rights reserved. 200 minuteman road andover, ma 01810 tel: 978-247-8000 fax: 978-623-0024 http://www.amcc.com empowering intelligent optical networks 3 product brief danube sonet/sdh sts-48/stm-16 framer/pointer processor part number s4805cbi11, revision 1.5, january 2003 figure 2: typial application typical application: s4805 in 2.488 gb/s sonet/sdh add/drop multiplexer application microprocessor control control addr data 16 13 danube s4805cbi mx_hs_622data_out[1:4] dx_hs_622clk_in dx_hs_622data_in[1:4] p/s & s/p sonet xcvr with clk rcvry serrxd sertxd fiber optic xcvr oc-48 fo signal fiber optic xcvr oc-12 fo signal rxd sertxd mx_hs_622clk_out amcc amcc s3024 cru serrxclk fiber optic xcvr oc-12 fo signal rxd sertxd amcc s3024 cru serrxclk fiber optic xcvr oc-12 fo signal rxd sertxd amcc s3024 cru serrxclk fiber optic xcvr oc-12 fo signal rxd sertxd amcc s3024 cru serrxclk s3455
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